The present invention relates to a digital data receiver, and more particularly to a digital data receiver for restoring a symbol timing of received signal and processing data sampled in response to the restored symbol timing.
In general, in a digital communication apparatus such as a digital high picture quality television, a transmitter transmits after modulating a data bit stream consisting of "0"s and "1"s to form an analog signal by using an appropriate modulating technique such as quadrature amplitude modulating QAM or quadrature phase shift keying QPSK, and a receiver restores by demodulating and sampling the transmitted analog signal to form the original data bit stream. At this moment, since the demodulated signal at a receiving side is an analog signal, an A/D conversion or a sampling for converting the analog signal to an original digital data is required. Accordingly, in restoring an exact symbol value from the demodulated signal at the receiving side, a most important factor is to exactly define a sampling position.
Generally, it is impossible to know the exact sampling position with regard to the transmitted signal at the receiving side. Accordingly, it is required to define the exact sampling position from exterior, and this stapling position defining is called as a `symbol timing`. As methods for restoring a symbol timing, there are a method for directly finding out an optimum stapling position from the analog signal input to the receiver, and a method for finding out an optimum sampling position by utilizing the data converted by analog-digital converted data.
As a prior art reference for finding out an optimum sampling position by using an analog-digital converted data, there is a U.S. Pat. No. 4,707,841 to Yen et al. issued on Nov. 11, 1987. In accordance with this reference, the received signal is asynchronously sampled at a minimum sampling rate in proportion to a channel band width, and the digitalized samples are stored to a memory. The stored data is processed by using an interpolation technique for restoring an appropriate symbol timing, and an appropriate symbol timing is obtained by a phase slide controller. Data bases are detected from aforesaid memory based on information obtained by equalization and decoding of the symbol data controlled via phase slide.
The present invention offers a technique for restoring a symbol timing from a received signal by a method different from aforesaid prior art.